| A 65-nm CMOS area optimized de-synchronization flow for sub-VT designs | 0 | 0.34 | 2013 |
| TamaRISC-CS: An ultra-low-power application-specific processor for compressed sensing | 10 | 0.76 | 2012 |
| A 500 fW/bit 14 fJ/bit-access 4kb standard-cell based sub-VT memory in 65nm CMOS | 8 | 0.86 | 2012 |
| Synthesis strategies for sub-VT systems | 4 | 0.58 | 2011 |
