| Analog Matrix Processor for Edge AI Real-Time Video Analytics. | 0 | 0.34 | 2022 |
| Analog in-memory subthreshold deep neural network accelerator | 3 | 0.57 | 2017 |
| Low-Power and Compact Analog-to-Digital Converter Using Spintronic Racetrack Memory Devices. | 4 | 0.46 | 2017 |
| 24.3 A 36.8 2b-TOPS/W self-calibrating GPS accelerator implemented using analog calculation in 65nm LP CMOS. | 0 | 0.34 | 2016 |
| Racetrack Converter: A Low Power And Compact Data Converter Using Racetrack Spintronic Devices | 1 | 0.38 | 2015 |
| A 346 µm 2 VCO-Based, Reference-Free, Self-Timed Sensor Interface for Cubic-Millimeter Sensor Nodes in 28 nm CMOS | 6 | 0.62 | 2014 |
| Razor-Lite: A Light-Weight Register for Error Detection by Observing Virtual Supply Rails | 17 | 0.85 | 2014 |
| Mixed-signal stochastic computation demonstrated in an image sensor with integrated 2D edge detection and noise filtering | 1 | 0.38 | 2014 |
| 16.3 A 23Mb/s 23pJ/b fully synthesized true-random-number generator in 28nm and 65nm CMOS | 18 | 1.66 | 2014 |
| A Millimeter-Scale Energy-Autonomous Sensor System With Stacked Battery and Solar Cells | 5 | 0.64 | 2013 |
| Centip3De: a many-core prototype exploring 3D integration and near-threshold computing | 9 | 0.51 | 2013 |
| Pulse amplification based dynamic synchronizers with metastability measurement using capacitance de-rating | 1 | 0.47 | 2013 |
| Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS | 22 | 1.14 | 2013 |
| Bubble Razor: Eliminating Timing Margins in an ARM Cortex-M3 Processor in 45 nm CMOS Using Architecturally Independent Error Detection and Correction | 59 | 2.22 | 2013 |
| Centip3De: A 64-Core, 3D Stacked Near-Threshold System | 14 | 0.62 | 2013 |
| Circuits for a Cubic-Millimeter Energy-Autonomous Wireless Intraocular Pressure Monitor | 7 | 0.75 | 2013 |
| Limits of Parallelism and Boosting in Dim Silicon | 4 | 0.43 | 2013 |
| Assessing the performance limits of parallelized near-threshold computing | 23 | 0.98 | 2012 |
| A Reliable Routing Architecture and Algorithm for NoCs | 10 | 0.49 | 2012 |
| Bubble Razor: An architecture-independent approach to timing-error detection and correction. | 42 | 2.08 | 2012 |
| Centip3De: A 3930DMIPS/W configurable near-threshold 3D stacked system with 64 ARM Cortex-M3 cores. | 9 | 0.72 | 2012 |
| Millimeter-scale nearly perpetual sensor system with stacked battery and solar cells. | 70 | 11.39 | 2010 |
| In situ delay-slack monitor for high-performance processors using an all-digital self-calibrating 5ps resolution time-to-digital converter | 21 | 1.37 | 2010 |
| A highly resilient routing algorithm for fault-tolerant NoCs | 128 | 3.94 | 2009 |
| Reconfigurable Multicore Server Processors for Low Power Operation | 2 | 0.76 | 2009 |
| Vicis: a reliable network for unreliable silicon | 108 | 2.76 | 2009 |
