Title
Centip3De: A 64-Core, 3D Stacked Near-Threshold System
Abstract
Centip3De uses the synergy between 3D integration and near-threshold computing to create a reconfigurable system that provides both energy-efficient operation and techniques to address single-thread performance bottlenecks. The original Centip3De design is a seven-layer 3D stacked design with 128 cores and 256 Mbytes of DRAM. Silicon results show a two-layer, 64-core system in 130-nm technology, which achieved an energy efficiency of 3,930 DMIPS/W.
Year
DOI
Venue
2013
10.1109/MM.2013.4
IEEE Micro
Keywords
Field
DocType
130-nm technology,reconfigurable system,64-core system,centip3de design,near-threshold computing,energy-efficient operation,silicon result,single-thread performance bottleneck,stacked near-threshold system,energy efficiency,threshold voltage,hardware,low power electronics,integrated circuits
Dram,Power management,Efficient energy use,Megabyte,Computer science,Parallel computing,Electrical engineering,Threshold voltage,Integrated circuit,Silicon,Embedded system,Low-power electronics
Journal
Volume
Issue
ISSN
33
2
2573-203X
Citations 
PageRank 
References 
14
0.62
0
Authors
15
Name
Order
Citations
PageRank
Ronald G. Dreslinski1125881.02
David Fick258436.85
Bharan Giridhar3764.93
Gyouho Kim430035.86
Sangwon Seo537122.84
M. Fojtik631228.45
Sudhir Satpathy726919.69
Yoonmyung Lee837243.01
Daeyeon Kim917624.36
Nurrachman Liu10533.21
Michael Wieckowski11768.75
Gregory Chen12231.13
Dennis Sylvester135295535.53
David Blaauw148916823.47
Trevor Mudge156139659.74