Tetsuya Sunata - Citegraph

Author Info

Name	Affiliation	Papers
TETSUYA SUNATA	Tokyo Univ Agr & Technol, Dept Comp & Informat Sci, Koganei, Tokyo 1848588, Japan	4
Collaborators	Citations	PageRank
20	23	3.07
Referers	Referees	References
97	56	25

Publications (4 rows)

Collaborators (20 rows)

Referers (97 rows)

Referees (56 rows)

Title	Citations	PageRank	Year
A Leakage Efficient Data Tlb Design For Embedded Processors	0	0.34	2011
A Leakage Efficient Instruction Tlb Design For Embedded Processors	0	0.34	2011
Reducing instruction TLB's leakage power consumption for embedded processors	1	0.36	2010
A fine-grain dynamic sleep control scheme in MIPS R3000	22	2.04	2008

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