Marek J. Patyra - Citegraph

Author Info

Name	Affiliation	Papers
MAREK J. PATYRA	Intel Corporation, MIS RA2-401, 5200 Elani Young Parkway, Hillsboro, OR 97124, USA	8
Collaborators	Citations	PageRank
20	22	3.99
Referers	Referees	References
78	101	70

Search Limit

100101

Publications (8 rows)

Collaborators (20 rows)

Referers (78 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Embedded Deterministic Test Points.	6	0.45	2017
On New Test Points for Compact Cell-Aware Tests.	1	0.35	2016
Embedded deterministic test points for compact cell-aware tests	7	0.52	2015
Hardware implementations of digital fuzzy logic controllers	4	1.04	1999
High-Performance Digital Defuzzification and Defuzzifier Circuit	2	0.39	1996
A degenerated fuzzy-number processing system based on artificial neural networks	1	0.37	1995
Synthesis and design automation of analog fuzzy logic VLSI circuits	1	0.51	1993
Fuzzy Logic Functions Synthesis - A CMOS Current Mirror Based Solution	0	0.34	1993

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