| A Dual Rail Circuits Synthesis Environment For The Implementation Of Multiple Output Boolean Functions | 0 | 0.34 | 1998 |
| Optimal synthesis of differential cascode voltage switch (DCVS) logic circuits using ordered binary decision diagrams (OBDDs) | 3 | 0.73 | 1995 |
| A New Efficient Dcvs Circuit Synthesis Technique Used For An Improved Implementation Of A Serial Parallel Multiplier | 0 | 0.34 | 1995 |
