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KOHEI ONIZUKA
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Name
Affiliation
Papers
KOHEI ONIZUKA
Univ Tokyo, Inst Ind Sci, Ctr Collaborat Res, Tokyo 1538505, Japan
9
Collaborators
Citations
PageRank
17
47
6.31
Referers
Referees
References
159
136
39
Search Limit
100
159
Publications (9 rows)
Collaborators (17 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
A new wave of CMOS power amplifier innovations: Fusing digital and analog techniques with large signal RF operations
1
0.35
2014
3.1 polar antenna impedance detection and tuning for efficiency improvement in a 3G/4G CMOS Power Amplifier
3
0.52
2014
A 28.3mW PA-closed loop for linearity and efficiency improvement integrated in a +27.1dBm WCDMA CMOS power amplifier.
1
0.41
2012
A 1.9 GHz CMOS Power Amplifier With Embedded Linearizer to Compensate AM-PM Distortion.
6
0.59
2012
A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique
4
0.56
2012
A 28.3 mW PA-Closed Loop for Linearity and Efficiency Improvement Integrated in a + 27.1 dBm WCDMA CMOS Power Amplifier.
6
0.80
2012
A 1.9/2.4ghz Dual Band Cmos Power Amplifier With Integrated Am-Pm Distortion Canceller
0
0.34
2011
Stacked-Chip Implementation of On-Chip Buck Converter for Distributed Power Supply System in SiPs
21
2.00
2007
V-Dd-Hopping Accelerators For On-Chip Power Supply Circuit To Achieve Nano Second-Order Transient Time
5
0.74
2006
1