Title
3.1 polar antenna impedance detection and tuning for efficiency improvement in a 3G/4G CMOS Power Amplifier
Abstract
One of the ultimate goals in power amplifier design is to enhance the effective efficiency and achieve a long battery life. Therefore, both the peak efficiency and the efficiency loss due to antenna impedance mismatch or power back-off are highly critical design issues. In particular, the challenge of the antenna impedance mismatch is becoming more severe, due to the increased frequency band and smaller antenna size. Moreover, the antenna mismatch also changes with time due to the user proximity effect [1].
Year
DOI
Venue
2014
10.1109/ISSCC.2014.6757336
Solid-State Circuits Conference Digest of Technical Papers
Keywords
Field
DocType
cmos analogue integrated circuits,antennas,impedance matching,power amplifiers,3g-4g cmos power amplifier design,antenna impedance mismatch,antenna size,efficiency loss,polar antenna impedance detection,polar antenna impedance tuning,power back-off,user proximity effect
Antenna (radio),Antenna measurement,Loop antenna,Computer science,Antenna efficiency,Electronic engineering,Antenna tuner,Antenna factor,RF power amplifier,Antenna amplifier,Electrical engineering
Conference
ISSN
Citations 
PageRank 
0193-6530
3
0.52
References 
Authors
4
5
Name
Order
Citations
PageRank
Shouhei Kousai112718.37
Kohei Onizuka2476.31
takashi yamaguchi330.52
Yasuhiko Kuriyama4102.41
Masami Nagaoka5101.73