Name
Papers
Collaborators
NIKIL DUTT
473
585
Citations 
PageRank 
Referers 
4960
421.49
7143
Referees 
References 
6773
6175
Search Limit
1001000
Title
Citations
PageRank
Year
The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing00.342022
Novel Blood Pressure Waveform Reconstruction from Photoplethysmography using Cycle Generative Adversarial Networks.00.342022
Dynamic Reliability Management in Neuromorphic Computing00.342021
Detection of COVID-19 Using Heart Rate and Blood Pressure: Lessons Learned from Patients with ARDS00.342021
CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation10.352020
Self-aware Memory Management for Emerging Energy-efficient Architectures00.342020
Cryptopim: In-Memory Acceleration For Lattice-Based Cryptographic Hardware00.342020
Edge-Assisted Control for Healthcare Internet of Things: A Case Study on PPG-Based Early Warning Score10.372020
An Efficient and Robust Deep Learning Method with 1-D Octave Convolution to Extract Fetal Electrocardiogram.10.412020
Exploiting Heterogeneous Mobile Architectures Through a Unified Runtime Framework.00.342019
Small Memory Footprint Neural Network Accelerators10.412019
A Real-time PPG Quality Assessment Approach for Healthcare Internet-of-Things20.382019
Hierarchical adaptive Multi-objective resource management for many-core systems10.362019
Chips-Ahoy: A Predictable Holistic Cyber-Physical Hypervisor For Mpsocs30.412018
Exploring Hybrid Memory Caches in Chip Multiprocessors10.342018
Guest Editorial: Special Issue on Self-Aware Systems on Chip.00.342018
Design Methodologies For Enabling Self-Awareness In Autonomous Systems00.342018
Self-Awareness in Systems on Chip - A Survey.40.522017
Empowering autonomy through self-awareness in MPSoCs00.342017
Dependability evaluation of SISO control-theoretic power managers for processor architectures20.362017
Neural and Synaptic Array Transceiver: A Brain-Inspired Computing Framework for Embedded Learning.20.362017
Self-awareness in remote health monitoring systems using wearable electronics.20.452017
Automatic management of Software Programmable Memories in Many-core Architectures.20.352016
Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC) Perspective.161.012016
Conquering MPSoC complexity with principles of a self-aware information processing factory.00.342016
Heat-aware transmission strategies00.342015
Exploiting Partially-Forgetful Memories for Approximate Computing170.712015
Cooperative On-Chip Temperature Estimation Using Multiple Virtual Sensors00.342015
Nsf Expedition On Variability-Aware Software: Recent Results And Contributions30.372015
Memory-aware cooperative CPU-GPU DVFS governor for mobile games40.462015
Introduction to Special Issue on Cross-layer Dependable Embedded Systems.00.342014
Editorial00.342014
Efficient spiking neural network model of pattern motion selectivity in visual cortex.70.582014
Virtualizing on-chip distributed ScratchPad memories for low power and trusted application execution10.352013
Vision-inspired global routing for enhanced performance and reliability00.342013
A Reliable, Safe, and Secure Run-Time Platform for Cyber Physical Systems10.352013
Modeling and analysis of fault-tolerant distributed memories for networks-on-chip20.362013
Categorization and decision-making in a neurobiologically plausible spiking network using a STDP-like learning rule.361.222013
VAWOM: Temperature and process variation aware WearOut Management in 3D multicore architecture90.452013
Biologically plausible models of homeostasis and STDP: Stability and learning in spiking neural networks100.592013
HDRL: Homogeneous Dual-Rail Logic for DPA Attack Resistive Secure Circuit Design40.442012
Meta-Cure: A reliability enhancement strategy for metadata in NAND flash memory storage systems230.972012
Combining code reordering and cache configuration20.362012
Guest Editorial Special Section on Memory Architectures and Organization00.342012
Software Controlled Memories for Scalable Many-Core Architectures30.372012
Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures170.752011
Neuromorphic modeling abstractions and simulation of large-scale cortical networks20.482011
FFT-cache: a flexible fault-tolerant cache architecture for ultra low voltage operation200.822011
Towards reverse engineering the brain: Modeling abstractions and simulation frameworks70.622010
Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures00.342010
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