The Self-Aware Information Processing Factory Paradigm for Mixed-Critical Multiprocessing | 0 | 0.34 | 2022 |
Novel Blood Pressure Waveform Reconstruction from Photoplethysmography using Cycle Generative Adversarial Networks. | 0 | 0.34 | 2022 |
Dynamic Reliability Management in Neuromorphic Computing | 0 | 0.34 | 2021 |
Detection of COVID-19 Using Heart Rate and Blood Pressure: Lessons Learned from Patients with ARDS | 0 | 0.34 | 2021 |
CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation | 1 | 0.35 | 2020 |
Self-aware Memory Management for Emerging Energy-efficient Architectures | 0 | 0.34 | 2020 |
Cryptopim: In-Memory Acceleration For Lattice-Based Cryptographic Hardware | 0 | 0.34 | 2020 |
Edge-Assisted Control for Healthcare Internet of Things: A Case Study on PPG-Based Early Warning Score | 1 | 0.37 | 2020 |
An Efficient and Robust Deep Learning Method with 1-D Octave Convolution to Extract Fetal Electrocardiogram. | 1 | 0.41 | 2020 |
Exploiting Heterogeneous Mobile Architectures Through a Unified Runtime Framework. | 0 | 0.34 | 2019 |
Small Memory Footprint Neural Network Accelerators | 1 | 0.41 | 2019 |
A Real-time PPG Quality Assessment Approach for Healthcare Internet-of-Things | 2 | 0.38 | 2019 |
Hierarchical adaptive Multi-objective resource management for many-core systems | 1 | 0.36 | 2019 |
Chips-Ahoy: A Predictable Holistic Cyber-Physical Hypervisor For Mpsocs | 3 | 0.41 | 2018 |
Exploring Hybrid Memory Caches in Chip Multiprocessors | 1 | 0.34 | 2018 |
Guest Editorial: Special Issue on Self-Aware Systems on Chip. | 0 | 0.34 | 2018 |
Design Methodologies For Enabling Self-Awareness In Autonomous Systems | 0 | 0.34 | 2018 |
Self-Awareness in Systems on Chip - A Survey. | 4 | 0.52 | 2017 |
Empowering autonomy through self-awareness in MPSoCs | 0 | 0.34 | 2017 |
Dependability evaluation of SISO control-theoretic power managers for processor architectures | 2 | 0.36 | 2017 |
Neural and Synaptic Array Transceiver: A Brain-Inspired Computing Framework for Embedded Learning. | 2 | 0.36 | 2017 |
Self-awareness in remote health monitoring systems using wearable electronics. | 2 | 0.45 | 2017 |
Automatic management of Software Programmable Memories in Many-core Architectures. | 2 | 0.35 | 2016 |
Toward Smart Embedded Systems: A Self-aware System-on-Chip (SoC) Perspective. | 16 | 1.01 | 2016 |
Conquering MPSoC complexity with principles of a self-aware information processing factory. | 0 | 0.34 | 2016 |
Heat-aware transmission strategies | 0 | 0.34 | 2015 |
Exploiting Partially-Forgetful Memories for Approximate Computing | 17 | 0.71 | 2015 |
Cooperative On-Chip Temperature Estimation Using Multiple Virtual Sensors | 0 | 0.34 | 2015 |
Nsf Expedition On Variability-Aware Software: Recent Results And Contributions | 3 | 0.37 | 2015 |
Memory-aware cooperative CPU-GPU DVFS governor for mobile games | 4 | 0.46 | 2015 |
Introduction to Special Issue on Cross-layer Dependable Embedded Systems. | 0 | 0.34 | 2014 |
Editorial | 0 | 0.34 | 2014 |
Efficient spiking neural network model of pattern motion selectivity in visual cortex. | 7 | 0.58 | 2014 |
Virtualizing on-chip distributed ScratchPad memories for low power and trusted application execution | 1 | 0.35 | 2013 |
Vision-inspired global routing for enhanced performance and reliability | 0 | 0.34 | 2013 |
A Reliable, Safe, and Secure Run-Time Platform for Cyber Physical Systems | 1 | 0.35 | 2013 |
Modeling and analysis of fault-tolerant distributed memories for networks-on-chip | 2 | 0.36 | 2013 |
Categorization and decision-making in a neurobiologically plausible spiking network using a STDP-like learning rule. | 36 | 1.22 | 2013 |
VAWOM: Temperature and process variation aware WearOut Management in 3D multicore architecture | 9 | 0.45 | 2013 |
Biologically plausible models of homeostasis and STDP: Stability and learning in spiking neural networks | 10 | 0.59 | 2013 |
HDRL: Homogeneous Dual-Rail Logic for DPA Attack Resistive Secure Circuit Design | 4 | 0.44 | 2012 |
Meta-Cure: A reliability enhancement strategy for metadata in NAND flash memory storage systems | 23 | 0.97 | 2012 |
Combining code reordering and cache configuration | 2 | 0.36 | 2012 |
Guest Editorial Special Section on Memory Architectures and Organization | 0 | 0.34 | 2012 |
Software Controlled Memories for Scalable Many-Core Architectures | 3 | 0.37 | 2012 |
Mapping Multi-Domain Applications Onto Coarse-Grained Reconfigurable Architectures | 17 | 0.75 | 2011 |
Neuromorphic modeling abstractions and simulation of large-scale cortical networks | 2 | 0.48 | 2011 |
FFT-cache: a flexible fault-tolerant cache architecture for ultra low voltage operation | 20 | 0.82 | 2011 |
Towards reverse engineering the brain: Modeling abstractions and simulation frameworks | 7 | 0.62 | 2010 |
Bandwidth Management in Application Mapping for Dynamically Reconfigurable Architectures | 0 | 0.34 | 2010 |