Name
Abstract | ||
|---|---|---|
The instruction cache is a popular optimization target due to the cache's high impact on system performance and power and because of the cache's predictable temporal and spatial locality. This article is an in depth study on the interaction of code reordering (a long-known technique) and cache configuration (a relatively new technique). Experimental results show that code reordering coupled with cache configuration reveals additional energy savings as high as 10--15% for several benchmarks with reduced cache area as high as 48%. To exploit these additional benefits, we architect and evaluate several design exploration heuristics for combining these two methods. |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1145/2362336.2399177 | ACM Trans. Embedded Comput. Syst. |
Keywords | Field | DocType |
long-known technique,high impact,reduced cache area,combining code reordering,cache configuration,additional energy saving,additional benefit,code reordering,depth study,new technique,instruction cache | Cache invalidation,Cache pollution,Cache,Computer science,Snoopy cache,Parallel computing,Cache algorithms,Page cache,Real-time computing,Cache coloring,Smart Cache | Journal |
Volume | Issue | ISSN |
11 | 4 | 1539-9087 |
Citations | PageRank | References |
2 | 0.36 | 36 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Ann Gordon-Ross | 1 | 513 | 47.78 |
| Frank Vahid | 2 | 2688 | 218.00 |
| Nikil Dutt | 3 | 4960 | 421.49 |