Author Info
Name
Affiliation
Papers
FAUSTO DISTANTE
Dipartimento di Elettronica ed Informazione - Politecnico di Milano Italy
6
Collaborators
Citations 
PageRank 
4
4
2.33
Referers 
Referees 
References 
9
26
14
Title
Citations
PageRank
Year
High level architectural synthesis: precedence analysis and automatic cycle detection in data flow graphs00.341994
High level synthesis through folding of data flow graphs: optimal intra-node scheduling10.481993
Behavioral Design, Simulation, and Evaluation of Array Processors: APES Environment00.341991
Behavioral testing of multilevel system software00.341988
Parallel processing: Array processors I00.341988
Distributed Architecture Design to Match Optimum Process Allocation: A Simulated Annealing Based Approach30.501987