A 5500-frames/s 85-GOPS/W 3-D Stacked BSI Vision Chip Based on Parallel In-Focal-Plane Acquisition and Processing | 2 | 0.40 | 2019 |
A 5500FPS 85GOPS/W 3D Stacked BSI Vision Chip Based on Parallel in-Focal-Plane Acquisition and Processing | 0 | 0.34 | 2018 |
HARS: A hardware-assisted runtime software for embedded many-core architectures. | 7 | 0.64 | 2014 |
An efficient and flexible hardware support for accelerating synchronization operations on the STHORM many-core architecture | 8 | 0.64 | 2013 |
Synthèse de haut niveau tenant compte de la dynamique des traitements. Analyse de la largeur des données d'applications du TDSI et gestion de cette information lors de la synthèse de haut niveau | 0 | 0.34 | 2008 |
A design flow dedicated to multi-mode architectures for DSP applications | 17 | 0.82 | 2007 |
Synthesis of Multimode digital signal processing systems | 1 | 0.35 | 2007 |
Bit-Width Aware High-Level Synthesis For Digital Signal Processing Systems | 7 | 0.58 | 2006 |
Synthèse portable pour micro-architectures à grain fin. Application aux turbo décodeurs et nanofabriques | 1 | 0.38 | 2006 |
Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit | 0 | 0.34 | 2005 |