| Pseudo Floating Point Representation For Non-Binary Turbo Decoder Extrinsic Information Memory Reduction | 0 | 0.34 | 2007 |
| Complexity And Efficiency Of Data Detection Algorithms For Td-Scdma | 0 | 0.34 | 2004 |
| Reverse tracing of forward state metric in Log-Map and MAX-Log-MAP decoders | 3 | 0.50 | 2003 |
| A design of the new FPGA with data path logic and run time block reconfiguration method | 1 | 0.35 | 1999 |
