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PHILIP BRISK
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Name
Affiliation
Papers
PHILIP BRISK
University of California, Riverside
23
Collaborators
Citations
PageRank
56
80
10.05
Referers
Referees
References
174
460
187
Search Limit
100
460
Publications (23 rows)
Collaborators (56 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
FA-LAMP: FPGA-Accelerated Learned Approximate Matrix Profile for Time Series Similarity Prediction
0
0.34
2021
Acoustic Side Channel Attack Against DNA Synthesis Machines: Poster Abstract
0
0.34
2020
Directed Placement for mVLSI Devices
0
0.34
2020
A performance-optimizing compiler for cyber-physical digital microfluidic biochips.
0
0.34
2020
TCAD EIC Message: February 2019.
0
0.34
2019
Matrix Profile XIV - Scaling Time Series Motif Discovery with GPUs to Break a Quintillion Pairwise Comparisons a Day and Beyond.
4
0.47
2019
Matrix Profile Xviii: Time Series Mining In The Face Of Fast Moving Streams Using A Learned Approximate Matrix Profile
0
0.34
2019
HLSPredict: cross platform performance prediction for FPGA high-level synthesis
1
0.35
2018
Scheduling and Fluid Routing for Flow-Based Microfluidic Laboratories-on-a-Chip.
3
0.42
2018
Exploiting a novel algorithm and GPUs to break the ten quadrillion pairwise comparisons barrier for time series motifs and joins.
5
0.54
2018
Exploration of approximate multipliers design space using carry propagation free compressors.
0
0.34
2018
Approximate Quaternary Addition With The Fast Carry Chains Of Fpgas
0
0.34
2018
PCB Escape Routing and Layer Minimization for Digital Microfluidic Biochips.
3
0.44
2017
Arbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking.
0
0.34
2017
GPU Performance Estimation using Software Rasterization and Machine Learning.
0
0.34
2017
HALWPE: Hardware-Assisted Light Weight Performance Estimation for GPUs.
0
0.34
2017
Diagonal Component Expansion for Flow-Layer Placement of Flow-Based Microfluidic Biochips.
2
0.39
2017
Design Automation for Paper Microfluidics with Passive Flow Substrates.
0
0.34
2017
Reducing Microfluidic Very Large Scale Integration (mVLSI) Chip Area by Seam Carving.
0
0.34
2017
Parallel FPGA routing based on the operator formulation
13
0.63
2014
A field-programmable pin-constrained digital microfluidic biochip
16
0.84
2013
Data-Flow Transformations to Maximize the Use of Carry-Save Representation in Arithmetic Circuits
17
0.92
2008
Optimal register sharing for high-level synthesis of SSA form programs
16
0.67
2006
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