Title
A performance-optimizing compiler for cyber-physical digital microfluidic biochips.
Abstract
This paper introduces a compiler optimization strategy for Software-Programmable Laboratories-on-a-Chip (SP-LoCs), which miniaturize and automate a wide variety of benchtop laboratory experiments. The compiler targets a specific class of SP-LoCs that manipulate discrete liquid droplets on a 2D grid, with cyber-physical feedback provided by integrated sensors and/or video monitoring equipment. The optimization strategy employed here aims to reduce the overhead of transporting fluids between operations, and explores tradeoffs between the latency and resource requirements of mixing operations: allocating more space for mixing shortens mixing time, but reduces the amount of spatial parallelism available to other operations. The compiler is empirically evaluated using a cycle-accurate simulator that mimics the behavior of the target SP-LoC. Our results show that a coalescing strategy, inspired by graph coloring register allocation, effectively reduces droplet transport latencies while speeding up the compiler and reducing its memory footprint. For biochemical reactions that are dominated by mixing operations, we observe a linear correlation between a preliminary result using a default mixing operation resource allocation and the percentage decrease in execution time that is achieved via resizing.
Year
DOI
Venue
2020
10.1145/3368826.3377925
CGO
Keywords
Field
DocType
laboratory-on-a-chip (LoC), microfluidics, digital microfluidic biochip (DMFB), interference graph, coalescing
Biochip,Computer science,Microfluidics,Parallel computing,Optimizing compiler,Cyber-physical system,Embedded system
Conference
ISSN
ISBN
Citations 
2164-2397
978-1-4503-7047-9
0
PageRank 
References 
Authors
0.34
0
3
Name
Order
Citations
PageRank
Tyson Loveless101.35
Jason Ott201.35
Philip Brisk38010.05