Jyothi Velamala - Citegraph

Author Info

Name	Affiliation	Papers
JYOTHI VELAMALA	Arizona State University, Tempe, AZ	8
Collaborators	Citations	PageRank
31	53	4.83
Referers	Referees	References
149	229	90

Search Limit

100229

Publications (8 rows)

Collaborators (31 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Susceptibility of planar and 3D tri-gate technologies to muon-induced single event upsets	0	0.34	2015
Cross-Layer Modeling and Simulation of Circuit Reliability	16	1.07	2014
A self-tuning design methodology for power-efficient multi-core systems	1	0.38	2012
Design sensitivity of single event transients in scaled logic circuits	8	0.64	2011
Optimized self-tuning for circuit aging	18	0.85	2010
In-situ characterization and extraction of SRAM variability	1	0.45	2010
A self-evolving design methodology for power efficient multi-core systems	2	0.45	2010
Circuit aging prediction for low-power operation	7	0.65	2009

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