Name
Title | Citations | PageRank | Year |
|---|---|---|---|
| Heterogeneous Multi-processor Coherent Interconnect | 0 | 0.34 | 2013 |
| A 1.5 Ghz VLIW DSP CPU with Integrated Floating Point and Fixed Point Instructions in 40 nm CMOS | 1 | 0.35 | 2011 |
| A 65nm C64x+ Multi-Core DSP Platform for Communications Infrastructure. | 10 | 1.30 | 2007 |
| A 600-Mhz Vliw Dsp | 33 | 2.36 | 2002 |