A pixel pipeline architecture with selective z-test scheme for 3D graphics processors. | 0 | 0.34 | 2013 |
A consistency-free memory architecture for sort-last parallel rendering processors | 0 | 0.34 | 2007 |
A processor architecture with effective memory system for sort-last parallel rendering | 0 | 0.34 | 2006 |
A pixel cache architecture with selective placement scheme based on z-test result | 0 | 0.34 | 2005 |
An effective pixel rasterization pipeline architecture for 3D rendering processors | 13 | 1.06 | 2003 |
A mid-texturing pixel rasterization pipeline architecture for 3D rendering processors | 1 | 0.41 | 2002 |