A 40 Gb/s Serial Link Transceiver in 28 nm CMOS Technology | 8 | 0.75 | 2015 |
A 40-Gb/s serial link transceiver in 28-nm CMOS technology | 1 | 0.37 | 2014 |
A 4×40 Gb/s quad-lane CDR with shared frequency tracking and data dependent jitter filtering | 0 | 0.34 | 2014 |
A Fast-Lock, Jitter Filtering All-Digital DLL Based Burst-Mode Memory Interface | 0 | 0.34 | 2014 |
A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems | 1 | 0.38 | 2013 |
A 2.3–4GHz injection-locked clock multiplier with 55.7% lock range and 10-ns power-on | 0 | 0.34 | 2012 |
A 32mW 7.4Gb/s protocol-agile source-series-terminated transmitter in 45nm CMOS SOI. | 0 | 0.34 | 2010 |
A physical alpha-power law MOSFET model | 3 | 1.72 | 1999 |
High-Throughput, Low-Memory Applications on the Pica Architecture | 6 | 0.55 | 1997 |