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ANTONIO LOPEZ-MARTIN
Author Info
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Name
Affiliation
Papers
ANTONIO LOPEZ-MARTIN
Univ Publ Navarra, Sch Ind & Telecommun Engn, Pamplona 31006, Spain
21
Collaborators
Citations
PageRank
56
34
9.14
Referers
Referees
References
109
127
42
Search Limit
100
127
Publications (21 rows)
Collaborators (56 rows)
Referers (100 rows)
Referees (100 rows)
Title
Citations
PageRank
Year
A 1.2-V Current-Mode RMS-to-DC Converter Based on a Novel Two-Quadrant Electronically Simulated MOS Translinear Loop
0
0.34
2020
Pseudo-Three-Stage Miller Op-Amp With Enhanced Small-Signal and Large-Signal Performance.
1
0.38
2019
±0.25-V Class-AB CMOS Capacitance Multiplier and Precision Rectifiers
0
0.34
2019
Subsampling OFDM-Based Ultrasonic Data Communication Through Metallic Channels for Monitoring of Cargo Containers
0
0.34
2019
Evaluating engineering competencies in curricular internships.
0
0.34
2018
Enhanced Single-Stage Folded Cascode OTA Suitable for Large Capacitive Loads.
3
0.44
2018
An Amplified Offset Compensation Scheme and Its Application in a Track and Hold Circuit.
0
0.34
2018
CMOS analogue current-mode multiplier/divider circuit operating in triode-saturation with bulk-driven techniques.
1
0.39
2017
A Simple Miller Compensation With Essential Bandwidth Improvement.
0
0.34
2017
Design of flexible cost-efficient international engineering curricula at Public University of Navarre
1
0.48
2015
Redefining best practices in company internships
0
0.34
2015
The role of university-industry liaisons in achieving comprehensive curricula in engineering
0
0.34
2014
Engineering outreach programs at the Public University of Navarre: A holistic approach.
3
0.86
2013
An ultra low energy 8-bit charge redistribution ADC for wireless sensors
0
0.34
2013
Techniques for the Design of Low Voltage Power Efficient Analog and Mixed Signal Circuits
0
0.34
2009
Highly linear tunable CMOS Gm-C low-pass filter
21
1.33
2009
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators
0
0.34
2008
A power efficient and simple scheme for dynamically biasing cascode amplifiers and telescopic op-amps
0
0.34
2008
A <formula formulatype="inline"><tex>$\pm$</tex> </formula>0.75-V Compact CMOS Class-AB Current-Mode Exponential Variable Gain Amplifier
1
0.36
2007
Techniques for very low-voltage operation of continuous-time analog CMOS circuits
0
0.34
2004
A fully parallel CMOS analog median filter
3
0.51
2000
1