| Regularization of hierarchical VHDL-AMS models using bipartite graphs | 3 | 1.00 | 2002 |
| A discrete algorithm for the regularization of hierarchical VHDL-AMS models | 0 | 0.34 | 2002 |
| VXML: VHDL Hardware Design Representation in XML. | 0 | 0.34 | 2000 |
| Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design) | 0 | 0.34 | 2000 |
| A scalable multithreaded compiler front-end. | 0 | 0.34 | 1999 |
