Rainer Laur - Citegraph

Author Info

Name	Affiliation	Papers
RAINER LAUR	Univ Bremen, Inst Electromagnet Theory & Microelect, Bremen, Germany	28
Collaborators	Citations	PageRank
36	241	35.65
Referers	Referees	References
517	234	138

Search Limit

100517

Publications (28 rows)

Collaborators (36 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Homotopy Method for Finding the Steady States of Oscillators.	1	0.36	2014
Simulation of the steady state of oscillators in the time domain	0	0.34	2012
Collaborative communication control based on sensor data management in WSN	2	0.44	2011
A High Performance Neurocomputing Algorithm for Prediction Tasks in Wireless Sensor Networks.	2	0.53	2011
Adaptive data sensing rate in ad-hoc sensor networks for autonomous transport application	2	0.45	2010
Comparison of Adaptive Approaches for Differential Evolution	12	0.79	2008
An effective method for state-of-charge estimation in wireless sensor networks	0	0.34	2007
Differential Evolution With Adaptive Parameter Setting For Multi-Objective Optimization	16	0.87	2007
Adaptive parameter setting for a multi-objective particle swarm optimization algorithm	9	0.75	2007
Stopping Criteria For A Constrained Single-Objective Particle Swarm Optimization Algorithm	31	1.95	2007
Constrained Single-Objective Optimization Using Particle Swarm Optimization	23	1.84	2006
Constrained Single-Objective Optimization Using Differential Evolution	30	1.81	2006
Parameter Study for Differential Evolution Using a Power Allocation Problem Including Interference Cancellation	53	2.37	2006
Parameter Adaptation For Differential Evolution With Design Of Experiments	3	0.45	2006
A new approach towards authenticated key agreement schemes for resource-constrained devices	0	0.34	2005
Steady state calculation of oscillators using continuation methods	3	0.73	2002
An accurate model for the transient simulation of lossy interconnects based on a novel discretization formula	0	0.34	2000
Time constrained modulo scheduling with global resource sharing	1	0.36	1999
Resource contrained modulo scheduling with global resource sharing	2	0.40	1998
On The Vlsi Implementation Of The International Data Encryption Algorithm Idea	21	4.32	1995
Fast simulation of the steady-state of circuits by the harmonic balance technique	6	3.75	1995
A HDTV-Suited Architecture for a Fast Full Search Block-Matching Algorithm	0	0.34	1995
A Simulation Tool For The Analysis And Verification Of The Steady-State Of Circuit Designs	2	0.59	1995
VLSI architecture for HDTV motion estimation based on block-matching algorithm	2	0.42	1994
A new strategy for test pattern generation in sequential circuits	0	0.34	1994
Modeling of frequency-dependent hysteresis with SPICE	0	0.34	1994
On the comparison between architectures for the implementation of distributed arithmetic	3	1.30	1993
MEDUSA--A Simulator for Modular Circuits	17	8.82	1982