Author Info
Name
Affiliation
Papers
NOBUHIRO TSUDA
Renesas Technology Corp, Adv Design Framework Dev Dept, Itami, Hyogo 6640005, Japan
2
Collaborators
Citations 
PageRank 
24
6
0.86
Referers 
Referees 
References 
14
38
11
Title
Citations
PageRank
Year
A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule20.372012
A Large-Scale, Flip-Flop Ram Imitating A Logic Lsi For Fast Development Of Process Technology40.492008