A 64Mb SRAM in 22nm SOI technology featuring fine-granularity power gating and low-energy power-supply-partition techniques for 37% leakage reduction | 2 | 0.52 | 2013 |
A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements. | 31 | 4.03 | 2012 |
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements. | 6 | 0.84 | 2011 |
A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management. | 4 | 1.92 | 2008 |
A 550ps Access-Time Compilable Sram In 65nm Cmos Technology | 2 | 1.05 | 2007 |
Design-For-Test Methods For Stand-Alone Srams At 1gb/S/Pin And Beyond | 2 | 1.03 | 2000 |