| LP-P2IP: A Low-Power Version of P1IP Architecture Using Partial Reconfiguration. | 0 | 0.34 | 2017 |
| P2IP: A novel low-latency Programmable Pipeline Image Processor. | 0 | 0.34 | 2015 |
| A new self-adapting architecture for feature detection. | 2 | 0.39 | 2012 |
| FPGA-based hardware acceleration: A CPU/accelerator interface exploration. | 1 | 0.36 | 2011 |
| Design of a low latency spectrum analyzer using the Goertzel Algorithm with a Network on Chip. | 0 | 0.34 | 2010 |
| Convergence in reconfigurable embedded systems | 0 | 0.34 | 2010 |
