Chou, E.Y. - Citegraph

Author Info

Name	Affiliation	Papers
CHOU, E.Y.	Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA\|c\|	2
Collaborators	Citations	PageRank
3	1	0.71
Referers	Referees	References
2	4	4

Publications (2 rows)

Collaborators (3 rows)

Referers (2 rows)

Referees (4 rows)

Title	Citations	PageRank	Year
A neural network communication equalizer with optimized solution capability	1	0.37	1996
A compact VLSI design for recursive neural networks with hardware annealing capability	0	0.34	1995

1