Yen-Po Chen - Citegraph

Author Info

Name	Affiliation	Papers
YEN-PO CHEN	Univ Michigan, Ann Arbor, MI 48109 USA	12
Collaborators	Citations	PageRank
51	120	9.64
Referers	Referees	References
423	186	48

Search Limit

100423

Publications (12 rows)

Collaborators (51 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence.	8	0.46	2017
11.2 A 1Mb embedded NOR flash memory with 39µW program power for mm-scale high-temperature sensor nodes	2	0.41	2017
An Injectable 64 nW ECG Mixed-Signal SoC in 65 nm for Arrhythmia Monitoring	32	1.85	2015
FOCUS: Key building blocks and integration strategy of a miniaturized wireless sensor node.	3	0.46	2015
A 266nW multi-chopper amplifier with 1.38 noise efficiency factor for neural signal recording	5	0.75	2014
Razor-Lite: A Light-Weight Register for Error Detection by Observing Virtual Supply Rails	17	0.85	2014
Circuit techniques for miniaturized biomedical sensors	0	0.34	2014
24.3 An implantable 64nW ECG-monitoring mixed-signal SoC for arrhythmia diagnosis	14	1.38	2014
Razor-lite: A side-channel error-detection register for timing-margin recovery in 45nm SOI CMOS	22	1.14	2013
Architecting an LTE base station with graphics processing units.	3	0.72	2013
A 2.98nW bandgap voltage reference using a self-tuning low leakage sample and hold	6	0.75	2012
A 4.5Tb/s 3.4Tb/s/W 64×64 switch fabric with self-updating least-recently-granted priority and quality-of-service arbitration in 45nm CMOS.	8	0.52	2012

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