Name
Title | ||
|---|---|---|
14.7 A 288µW programmable deep-learning processor with 270KB on-chip weight storage using non-uniform memory hierarchy for mobile intelligence. |
Abstract | ||
|---|---|---|
Deep learning has proven to be a powerful tool for a wide range of applications, such as speech recognition and object detection, among others. Recently there has been increased interest in deep learning for mobile IoT [1] to enable intelligence at the edge and shield the cloud from a deluge of data by only forwarding meaningful events. This hierarchical intelligence thereby enhances radio bandwidth and power efficiency by trading-off computation and communication at edge devices. Since many mobile applications are “always-on” (e.g., voice commands), low power is a critical design constraint. However, prior works have focused on high performance reconfigurable processors [2–3] optimized for large-scale deep neural networks (DNNs) that consume u003e50mW. Off-chip weight storage in DRAM is also common in the prior works [2–3], which implies significant additional power consumption due to intensive off-chip data movement. |
Year | Venue | Field |
|---|---|---|
2017 | ISSCC | Dram,Memory hierarchy,System on a chip,Computer science,Edge device,Bandwidth (signal processing),Memory management,Artificial intelligence,Deep learning,Electrical engineering,Cloud computing,Embedded system |
DocType | Citations | PageRank |
Conference | 8 | 0.46 |
References | Authors | |
2 | 14 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Suyoung Bang | 1 | 187 | 20.83 |
| Jingcheng Wang | 2 | 259 | 32.34 |
| Ziyun Li | 3 | 32 | 6.62 |
| Cao Gao | 4 | 106 | 4.14 |
| Yejoong Kim | 5 | 276 | 31.29 |
| Qing Dong | 6 | 95 | 12.29 |
| Yen-Po Chen | 7 | 120 | 9.64 |
| Laura Fick | 8 | 16 | 2.89 |
| Xun Sun | 9 | 96 | 14.84 |
| Ronald G. Dreslinski | 10 | 1258 | 81.02 |
| Trevor Mudge | 11 | 6139 | 659.74 |
| Hun-Seok Kim | 12 | 57 | 9.07 |
| David Blaauw | 13 | 8916 | 823.47 |
| Dennis Sylvester | 14 | 5295 | 535.53 |