A Yield and Reliability Improvement Methodology Based on Logic Redundant Repair with a Repairable Scan Flip-Flop Designed by Push Rule | 2 | 0.37 | 2012 |
A yield improvement methodology based on logic redundant repair with a repairable scan flip-flop designed by push rule | 0 | 0.34 | 2010 |
Synchronous Ultra-High-Density 2RW Dual-Port 8T-SRAM With Circumvention of Simultaneous Common-Row-Access | 13 | 1.11 | 2009 |
A Large-Scale, Flip-Flop Ram Imitating A Logic Lsi For Fast Development Of Process Technology | 4 | 0.49 | 2008 |
A 45nm Low-Standby-Power Embedded SRAM with Improved Immunity Against Process and Temperature Variations. | 29 | 6.58 | 2007 |