| A novel tri-state device implemented with a metal gated QCA | 0 | 0.34 | 2014 |
| Challenges and promises of nano and bio communication networks | 1 | 0.35 | 2011 |
| Application modelling and hardware description for network-on-chip benchmarking | 2 | 0.44 | 2009 |
| Energy reduction through crosstalk avoidance coding in networks on chip | 9 | 0.51 | 2008 |
| Coordinated Versus Uncoordinated Checkpoint Recovery For Network-On-Chip Based Systems | 1 | 0.37 | 2008 |
| Design of Low Power & Reliable Networks on Chip Through Joint Crosstalk Avoidance and Multiple Error Correction Coding | 28 | 1.11 | 2008 |
| Communication Aware Recovery Configurations for Networks-on-Chip | 0 | 0.34 | 2008 |
| Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding | 6 | 0.58 | 2007 |
| Towards Open Network-on-Chip Benchmarks | 16 | 0.89 | 2007 |
| Testing Network-on-Chip Communication Fabrics | 36 | 1.19 | 2007 |
| Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics | 3 | 0.40 | 2007 |
| An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic | 5 | 0.49 | 2007 |
| Essential Fault-Tolerance Metrics for NoC Infrastructures | 22 | 1.24 | 2007 |
| Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding | 37 | 1.32 | 2006 |
| BIST for Network-on-Chip Interconnect Infrastructures | 55 | 1.81 | 2006 |
| On-line Fault Detection and Location for NoC Interconnects | 46 | 1.77 | 2006 |
| Crosstalk-Aware Energy Reduction In Noc Communication Fabrics | 8 | 0.63 | 2006 |
| System-on-Chip: Reuse and Integration | 66 | 3.65 | 2006 |
| Energy Reduction through Crosstalk Avoidance Coding in NoC Paradigm | 7 | 0.51 | 2006 |
| NoC Interconnect Yield Improvement Using Crosspoint Redundancy | 19 | 1.05 | 2006 |
| Design, Synthesis, and Test of Networks on Chips | 83 | 3.47 | 2005 |
| Performance evaluation and design trade-offs for network-on-chip interconnect architectures | 376 | 14.94 | 2005 |
| Methodologies and Algorithms for Testing Switch-Based NoC Interconnects | 27 | 1.24 | 2005 |
| Timing analysis of network on chip architectures for MP-SoC platforms | 33 | 2.42 | 2005 |
| A Scalable Communication-Centric SoC Interconnect Architecture | 25 | 2.09 | 2004 |
| Structured interconnect architecture: a solution for the non-scalability of bus-based SoCs | 18 | 1.62 | 2004 |
| High-throughput switch-based interconnect for future SoCs | 13 | 1.81 | 2003 |
| Design of a switch for network on chip applications | 69 | 4.48 | 2003 |
