| Character recognition of Tibetan Historical document in Uchen font: Dataset and bench mark | 0 | 0.34 | 2022 |
| MGCN: descriptor learning using multiscale GCNs | 0 | 0.34 | 2020 |
| A 130-nm Ferroelectric Nonvolatile System-on-Chip With Direct Peripheral Restore Architecture for Transient Computing System | 2 | 0.40 | 2019 |
| A Wavelet Energy Decomposition Signature for Robust Non-Rigid Shape Matching | 0 | 0.34 | 2019 |
| Isotropic Surface Remeshing without Large and Small Angles. | 1 | 0.34 | 2019 |
| A Robust Local Spectral Descriptor For Matching Non-Rigid Shapes With Incompatible Shape Structures | 0 | 0.34 | 2019 |
| Research on the Method of Tibetan Recognition Based on Component Location Information. | 0 | 0.34 | 2018 |
| Research on Text Line Segmentation of Historical Tibetan Documents Based on the Connected Component Analysis. | 0 | 0.34 | 2018 |
| High-quality 2D mesh generation without obtuse and small angles. | 2 | 0.36 | 2018 |
| A Recognition Method of the Similarity Character for Uchen Script Tibetan Historical Document Based on DNN. | 0 | 0.34 | 2018 |
| Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes. | 1 | 0.35 | 2017 |
| Robust optimal power flow with transmission switching | 0 | 0.34 | 2017 |
| Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems | 3 | 0.37 | 2017 |
| Obtuse triangle elimination for isotropic remeshing | 2 | 0.35 | 2017 |
| A Ferroelectric Nonvolatile Processor with 46 $\mu $ s System-Level Wake-up Time and 14 $\mu $ s Sleep Time for Energy Harvesting Applications. | 8 | 0.61 | 2017 |
| Obtuse triangle removal for 2D mesh generation. | 0 | 0.34 | 2016 |
| Storage-less and Converter-less Photovoltaic Energy Harvesting with Maximum Power Point Tracking for Internet of Things | 19 | 0.81 | 2016 |
| NVPsim: A simulator for architecture explorations of nonvolatile processors | 1 | 0.36 | 2016 |
| Ambient energy harvesting nonvolatile processors: from circuit to system | 32 | 1.21 | 2015 |
| PaCC: A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors | 13 | 0.75 | 2014 |
| Register allocation for hybrid register architecture in nonvolatile processors | 2 | 0.38 | 2014 |
| SPaC: a segment-based parallel compression for backup acceleration in nonvolatile processors | 18 | 0.83 | 2013 |
| A 3us wake-up time nonvolatile processor based on ferroelectric flip-flops | 84 | 3.48 | 2012 |
| A compression-based area-efficient recovery architecture for nonvolatile processors | 24 | 2.60 | 2012 |
| Lifetime-Aware Battery Allocation For Wireless Sensor Network Under Cost Constraints | 4 | 0.45 | 2012 |
| An energy harvesting nonvolatile sensor node and its application to distributed moving object detection | 0 | 0.34 | 2012 |
| Battery allocation for wireless sensor network lifetime maximization under cost constraints | 10 | 0.60 | 2009 |
