Author Info
Name
Affiliation
Papers
ZHENG YU
Fudan Univ, State Key Lab ASIC & Syst, Shanghai 201203, Peoples R China
3
Collaborators
Citations 
PageRank 
22
21
2.04
Referers 
Referees 
References 
89
132
21
Search Limit
100132
Title
Citations
PageRank
Year
A 16-Core Processor With Shared-Memory and Message-Passing Communications30.432014
A 65nm 39GOPS/W 24-core processor with 11Tb/s/W packet-controlled circuit-switched double-layer network-on-chip and heterogeneous execution array171.242013
H.264 video parallel decoder on a 24-core processor10.372013