Jeong-A. Lee - Citegraph

Author Info

Name	Affiliation	Papers
JEONG-A. LEE	Department of Information Technology and Systems,Delft University of Technology,Delft,The Netherlands	37
Collaborators	Citations	PageRank
60	586	152.69
Referers	Referees	References
1327	683	259

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Publications (37 rows)

Collaborators (60 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Improved error detection performance of logic implication checking in FPGA circuits	0	0.34	2020
A Computerized Bioinspired Methodology for Lightweight and Reliable Neural Telemetry.	0	0.34	2020
Design and Performance Evaluation of a Low-Cost Autonomous Sensor Interface for a Smart IoT-Based Irrigation Monitoring and Control System.	0	0.34	2019
DURE: An Energy- and Resource-Efficient TCAM Architecture for FPGAs With Dynamic Updates	2	0.39	2019
SEDC-Based Hardware-Level Fault Tolerance and Fault Secure Checker Design for Big Data and Cloud Computing.	0	0.34	2018
Generation Methodology for Good-Enough Approximate Modules of ATMR.	1	0.37	2018
Bio-inspired self-aware fault-tolerant routing protocol for network-on-chip architectures using Particle Swarm Optimization.	0	0.34	2017
FPGA-based design of an intelligent on-chip sensor network monitoring and control using dynamically reconfigurable autonomous sensor agents	0	0.34	2016
An Autonomous Self-Aware and Adaptive Fault Tolerant Routing Technique for Wireless Sensor Networks	4	0.40	2015
Self-repairing adder using fault localization.	6	0.46	2014
Comments on "Self-Checking Carry-Select Adder Design Based on Two-Rail Encoding".	6	0.42	2014
A novel run-time auto-reconfigurable FPGA architecture for fast fault recovery with backward compatibility (abstract only)	0	0.34	2013
Area-Time Efficient Self-Checking ALU Based on Scalable Error Detection Coding	0	0.34	2013
Self-Checking Carry Select Adder with Fault Localization	0	0.34	2013
SAFE-points: a lightweight algorithm for analyzing remote mobile ECG signals	1	0.37	2012
Thermal Analysis for 3D Multi-core Processors with Dynamic Frequency Scaling	2	0.38	2010
Reconfiguration For Sensitivity Technique: A Qos-Aware Co-Design Approach For Stream-Based Applications	0	0.34	2010
Intelligent Sensor Node Based A Low Power Ecg Monitoring System	1	0.36	2009
Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming	0	0.34	2009
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions	1	0.37	2007
Proceedings of the International MultiConference of Engineers and Computer Scientists 2007, IMECS 2007, March 21-23, 2007, Hong Kong, China	462	126.68	2007
A Design Method for Heterogeneous Adders	3	0.49	2007
Proceedings of the International MultiConference of Engineers and Computer Scientists 2006, IMECS '06, June 20-22, 2006, Hong Kong, China	36	9.10	2006
Asynchronous Multiple-Issue On-Chip Bus With In-Order/Out-Of-Order Completion	0	0.34	2005
A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme	0	0.34	2005
Design of a Mutated Adder and Its Optimization Using ILP Formulation	0	0.34	2005
Self-timed interconnect with layered interface based on distributed and modularized control for multimedia socs	0	0.34	2005
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System	0	0.34	2004
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization	0	0.34	2004
Operation Net System: A Formal Design Representation Model for High-Level Synthesis of Asynchronous Systems Based on Transformations	1	0.37	2004
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption	0	0.34	2004
Producer and Consumer: Roles of a Microprocessor and a Configurable Logic in a Configurable SoC	0	0.34	2003
A Floating Point Vectoring Algorithm Based on Fast Rotations	0	0.34	2000
VLSI implementation of CORDIC angle units	1	0.43	1994
Constant-factor redundant CORDIC for angle calculation and rotation	52	4.10	1992
SVD by constant-factor-redundant-CORDIC	7	0.90	1991
Discrete Fourier transform processors using CORDIC	0	0.34	1991