| CliqueMap: productionizing an RMA-based distributed caching system | 0 | 0.34 | 2021 |
| 1RMA: Re-envisioning Remote Memory Access for Multi-tenant Datacenters | 3 | 0.39 | 2020 |
| Top Picks from the 2015 Computer Architecture Conferences. | 0 | 0.34 | 2016 |
| Everything You Want to Know About Pointer-Based Checking. | 13 | 0.55 | 2015 |
| Synthesizing Finite-State Protocols from Scenarios and Requirements. | 12 | 0.57 | 2014 |
| WatchdogLite: Hardware-Accelerated Compiler-Based Pointer Checking | 26 | 0.80 | 2014 |
| Syntax-guided synthesis. | 15 | 0.79 | 2013 |
| Utilizing Dark Silicon to Save Energy with Computational Sprinting | 10 | 0.53 | 2013 |
| Hardware-Enforced Comprehensive Memory Safety | 8 | 0.43 | 2013 |
| Designing for Responsiveness with Computational Sprinting | 4 | 0.36 | 2013 |
| Computational sprinting | 34 | 1.39 | 2012 |
| Why on-chip cache coherence is here to stay | 126 | 3.04 | 2012 |
| An axiomatic memory model for POWER multiprocessors | 48 | 1.26 | 2012 |
| Litmus tests for comparing memory consistency models: how long do they need to be? | 5 | 0.43 | 2011 |
| RETCON: transactional repair without replay | 18 | 0.71 | 2010 |
| Generating litmus tests for contrasting memory consistency models | 23 | 0.82 | 2010 |
| Token tenure and PATCH: A predictive/adaptive token-counting hybrid | 1 | 0.35 | 2010 |
| Overcoming an Untrusted Computing Base: Detecting and Removing Malicious Hardware Automatically | 94 | 3.59 | 2010 |
| CETS: compiler enforced temporal safety for C | 124 | 2.88 | 2010 |
| SoftBound: highly compatible and complete spatial memory safety for c | 187 | 4.64 | 2009 |
| InvisiFence: performance-transparent memory ordering in conventional multiprocessors | 60 | 1.53 | 2009 |
| CheckFence: checking consistency of concurrent data types on relaxed memory models | 81 | 3.72 | 2007 |
| Making the fast case common and the uncommon case simple in unbounded transactional memory | 71 | 2.53 | 2007 |
| NoSQ: Store-Load Communication without a Store Queue | 29 | 1.08 | 2007 |
| Bounded model checking of concurrent data types on relaxed memory models: a case study | 19 | 1.94 | 2006 |
| Subtleties of Transactional Memory Atomicity Semantics | 103 | 4.82 | 2006 |
| Improving Multiple-CMP Systems Using Token Coherence | 54 | 6.50 | 2005 |
| Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset | 885 | 40.84 | 2005 |
| Scalable Store-Load Forwarding via Store Queue Index Prediction | 32 | 1.06 | 2005 |
| Formal Verification and its Impact on the Snooping versus Directory Protocol Debate | 13 | 0.73 | 2005 |
| Verifying safety of a token coherence implementation by parametric compositional refinement | 5 | 0.44 | 2005 |
| Using destination-set prediction to improve the latency/bandwidth tradeoff in shared-memory multiprocessors | 70 | 2.98 | 2003 |
| Token coherence: decoupling performance and correctness | 144 | 5.46 | 2003 |
| Simulating a $2M Commercial Server on a $2K PC | 70 | 7.32 | 2003 |
| Token Coherence: A New Framework for Shared-Memory Multiprocessors | 19 | 3.51 | 2003 |
| SafetyNet: improving the availability of shared memory multiprocessors with global checkpoint/recovery | 163 | 7.70 | 2002 |
| Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol | 28 | 3.95 | 2002 |
| Correctly implementing value prediction in microprocessors that support multithreading or multiprocessing | 30 | 1.94 | 2001 |
| Exploiting dead value information | 50 | 2.94 | 1997 |
