Name
Papers
Collaborators
LUCA MACCHIARULO
25
29
Citations 
PageRank 
Referers 
240
19.08
492
Referees 
References 
390
211
Search Limit
100492
Title
Citations
PageRank
Year
A jumper insertion algorithm under antenna ratio and timing constraints10.352011
Digital Heart-Rate Variability Parameter Monitoring and Assessment ASIC00.342010
Enhancing double-patterning detailed routing with lazy coloring and within-path conflict avoidance100.852010
A case study for NoC-based homogeneous MPSoC architectures160.852009
Adaptive Latency Insensitive Protocols and Elastic Circuits with Early Evaluation: A Comparative Analysis50.482009
Adaptive Latency-Insensitive Protocols80.542007
Floorplanning With Wire Pipelining in Adaptive Communication Channels20.392006
Implementation analysis of NoC: a MPSoC trace-driven approach211.342006
A New System Design Methodology for Wire Pipelined SoC10.352005
Floorplan assisted data rate enhancement through wire pipelining: a real assessment10.352005
Issues in Implementing Latency Insensitive Protocols91.032004
On-chip transparent wire pipelining30.462004
Floorplanning for throughput151.172004
A new approach to latency insensitive design451.702004
A comparison between mask- and field-programmable routing structures on industrial FPGA architectures10.362004
Pipelining Sequential Circuits with Wave Steering10.382004
Layout-driven memory synthesis for embedded systems-on-chip432.582002
Enhanced clustered voltage scaling for low power60.562002
FPGA-Based Fault Injection Techniques for Fast Evaluation of Fault Tolerance in VLSI Circuits50.642001
Low-energy for deep-submicron address buses161.252001
On-the-fly layout generation for PTL macrocells180.942001
A Comment on 'Graph-Based Algorithm for Boolean Function Manipulation'10.632000
A novel high throughput reconfigurable FPGA architecture30.472000
Wave steered FSMs50.592000
Wave-steering one-hot encoded FSMs40.512000