Title
Enhanced clustered voltage scaling for low power
Abstract
This paper presents a voltage scaling approach that is based on an enhanced variant of clustered voltage scaling originally proposed by Usami and Horowitz ([1]) The results show that subtituting the original depth first strategy with a breadth first one results in improved speed and quality of results. Data are validated through power and timing analysis performed with a commercial tool.
Year
DOI
Venue
2002
10.1145/505306.505311
ACM Great Lakes Symposium on VLSI
Keywords
Field
DocType
low power,original depth,improved speed,enhanced variant,voltage scaling approach,timing analysis,commercial tool,inductance,inductive coupling
Loop inductance,Inductance,Inductive coupling,Computer science,Voltage,Depth-first search,Breadth-first search,Electronic engineering,Static timing analysis,Electrical engineering,Scaling
Conference
ISBN
Citations 
PageRank 
1-58113-462-2
6
0.56
References 
Authors
6
5
Name
Order
Citations
PageRank
Monica Donno1854.68
Luca Macchiarulo224019.08
Alberto Macii371078.83
Enrico Macii42405349.96
Massimo Poncino546057.48