| Adaptive Compiler Strategies for Mitigating Timing Side Channel Attacks | 4 | 0.44 | 2020 |
| HiPEAC compilation architecture | 0 | 0.34 | 2018 |
| Taming Parallelism in a Multi-Variant Execution Environment. | 1 | 0.35 | 2017 |
| Sofia: Software And Control Flow Integrity Architecture | 9 | 0.48 | 2017 |
| Link-time smart card code hardening. | 3 | 0.37 | 2016 |
| Evaluation of dynamic binary translation techniques for full system virtualisation on ARMv7-A. | 1 | 0.35 | 2016 |
| Formal virtualization requirements for the ARM architecture | 4 | 0.41 | 2013 |
| Protecting Your Software Updates | 5 | 0.48 | 2013 |
| Mitigating Smart Card Fault Injection with Link-Time Code Rewriting: A Feasibility Study. | 4 | 0.42 | 2013 |
| A novel obfuscation: class hierarchy flattening | 2 | 0.36 | 2012 |
| DNS tunneling for network penetration | 4 | 0.69 | 2012 |
| GHUMVEE: efficient, effective, and flexible replication | 6 | 0.41 | 2012 |
| Introduction to the special issue on high-performance and embedded architectures and compilers | 1 | 0.35 | 2012 |
| The Paralax infrastructure: automatic parallelization with a helping hand | 46 | 1.27 | 2010 |
| Accelerating Multiple Sequence Alignment with the Cell BE Processor | 4 | 0.43 | 2010 |
| A profile-based tool for finding pipeline parallelism in sequential programs | 22 | 0.87 | 2010 |
| Towards automatic program partitioning | 3 | 0.41 | 2009 |
| Experiences with parallelizing a bio-informatics program on the cell BE | 5 | 0.55 | 2008 |
| Memory footprint reduction for embedded systems | 0 | 0.34 | 2008 |
| Upcoming Computing System Challenges - The Hipeac Vision | 1 | 0.35 | 2008 |
| Instruction Set Limitation in Support of Software Diversity | 8 | 0.53 | 2008 |
| Constructing optimal XOR-functions to minimize cache conflict misses | 3 | 0.45 | 2008 |
| Extracting coarse-grain parallelism in general-purpose programs | 6 | 0.54 | 2008 |
| Behavior-Based Branch Prediction by Dynamically Clustering Branch Instructions | 1 | 0.38 | 2008 |
| Towards tamper resistant code encryption: practice and experience | 22 | 1.00 | 2008 |
| 08441 Final Report - Emerging Uses and Paradigms for Dynamic Binary Translation. | 0 | 0.34 | 2008 |
| High-Performance Embedded Architecture and Compilation Roadmap | 26 | 1.64 | 2007 |
| Link-time compaction and optimization of ARM executables | 8 | 0.57 | 2007 |
| Clustered indexing for branch predictors | 1 | 0.36 | 2007 |
| High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings | 19 | 1.09 | 2007 |
| Automated reduction of the memory footprint of the Linux kernel | 11 | 0.57 | 2007 |
| Whole-program linear-constant analysis with applications to link-time optimization | 1 | 0.35 | 2007 |
| Exploiting video stream similarity for energy-efficient decoding | 4 | 0.48 | 2007 |
| Program obfuscation: a quantitative approach | 29 | 1.18 | 2007 |
| Exploiting program phase behavior for energy reduction on multi-configuration processors | 4 | 0.43 | 2007 |
| Function level parallelism driven by data dependencies | 16 | 0.83 | 2007 |
| Object-relative addressing: compressed pointers in 64-bit java virtual machines | 1 | 0.35 | 2007 |
| Run-time randomization to mitigate tampering | 6 | 0.58 | 2007 |
| Java object header elimination for reduced memory consumption in 64-bit virtual machines | 5 | 0.44 | 2007 |
| Opaque predicates detection by abstract interpretation | 26 | 0.87 | 2006 |
| On the Effectiveness of Source Code Transformations for Binary Obfuscation | 11 | 0.56 | 2006 |
| Bidirectional liveness analysis, or how less than half of the alpha's registers are used | 2 | 0.37 | 2006 |
| NSL-BLRL: Efficient CacheWarmup for Sampled Processor Simulation | 4 | 0.46 | 2006 |
| Topic 7: Parallel Computer Architecture and Instruction Level Parallelism | 0 | 0.34 | 2006 |
| Understanding Obfuscated Code | 2 | 0.37 | 2006 |
| Proceedings of the 2006 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'06), Ottawa, Ontario, Canada, June 14-16, 2006 | 2 | 1.00 | 2006 |
| LOCO: an interactive code (De)obfuscation tool | 26 | 1.16 | 2006 |
| Yet shorter warmup by combining no-state-loss and MRRL for sampled LRU cache simulation | 4 | 0.42 | 2006 |
| Accurate memory data flow modeling in statistical simulation | 8 | 0.64 | 2006 |
| Building Java program analysis tools using Javana | 3 | 0.45 | 2006 |
