Author Info
Name
Affiliation
Papers
JAEWOONG CHUNG
Intel Labs, Santa Clara, USA
22
Collaborators
Citations 
PageRank 
43
993
52.00
Referers 
Referees 
References 
1529
626
335
Search Limit
1001000
Title
Citations
PageRank
Year
THEMIS: A Mutually Verifiable Billing System for the Cloud Computing Environment261.192013
Hybrid DRAM/PRAM-based main memory for single-chip CPU/GPU190.812012
Optimizing the Concurrent Execution of Locks and Transactions.40.422011
ASF: AMD64 Extension for Lock-Free Data Structures and Transactional Memory341.252010
Analysis on semantic transactional memory footprint for hardware transactional memory10.352010
Evaluation of AMD's advanced synchronization facility within a complete transactional memory stack441.422010
Fast memory snapshot for concurrent programmingwithout synchronization30.432009
Improving software concurrency with hardware-assisted memory snapshot10.372008
Thread-Safe Dynamic Binary Translation Using Transactional Memory200.722008
Stamp: Stanford Transactional Applications For Multi-Processing44012.422008
Towards soft optimization techniques for parallel cognitive applications51.002007
Transactional Memory: The Hardware-Software Interface40.442007
An effective hybrid transactional memory system with strong isolation guarantees1496.712007
Architectural Semantics for Practical Transactional Memory604.202006
Executing Java programs with transactional memory60.452006
The common case transactional behavior of multithreaded programs506.572006
The Atomos transactional programming language768.262006
TAPE: a transactional application profiling environment131.032005
Characterization of TCC on Chip-Multiprocessors292.632005
Efficient fine-grain sharing support for software DSMs through segmentation00.342001
Boosting superpage utilization with the shadow memory and the partial-subblock TLB10.382000
Moving Home-Based Lazy Release Consistency for Shared Virtual Memory Systems80.611999