Paper Info
Title
Analysis on semantic transactional memory footprint for hardware transactional memory
Abstract
We analyze various characteristics of semantic transactional memory footprint (STMF) that consists of only the memory accesses the underlying hardware transactional memory (HTM) system has to manage for the correct execution of transactional programs. Our analysis shows that STMF can be significantly smaller than declarative transactional memory footprint (DTMF) that contains all memory accesses within transaction boundaries (i.e., only 8.3% of DTMF in the applications examined). This result encourages processor designers and software toolchain developers to explore new design points for low-cost HTM systems and intelligent software toolchains to find and leverage STMF efficiently. We identify seven code patterns that belong to DTMF, but not to STMF, and show that they take up 91.7% of all memory accesses in transactional boundaries, on average, for the transactional programs examined. A new instruction prefix is proposed to express STMF efficiently, and the existing compiler techniques are examined to check their applicability to deduce STMF from DTMF. Our trace analysis shows that using STMF significantly reduces the ratio of transactions overflowing a 32KB L1 cache, from 12.80% to 2.00%, and substantially lowers the false positive probability of Bloom filters used for transaction signature management, from 23.60% to less than 0.001%. The simulation result shows that the STAMP applications with the STMF expression run 40% faster on average than those with the DTMF expression.
Year
DOI
Venue
2010
10.1109/IISWC.2010.5649529
IISWC
Keywords
Field
DocType
false positive probability,intelligent software toolchains,dtmf expression,cache storage,intelligent software toolchain,transactional program,memory access,declarative transactional memory footprint,leverage stmf,transaction processing,semantic transactional memory footprint,bloom filters,32kb l1 cache,instruction prefix,underlying hardware transactional memory,transactional boundary,trace analysis,hardware transactional memory,transaction signature management,probability,stmf expression run,hardware,registers,bloom filter,instruction sets,genomics,bioinformatics,transactional memory,false positive
Transaction processing,Software transactional memory,Bloom filter,Computer science,CPU cache,Parallel computing,Compiler,Transactional memory,Real-time computing,Software,Toolchain,Operating system
Conference
ISBN
Citations 
PageRank 
978-1-4244-9296-1
1
0.35
References 
Authors
12
3
Name
Order
Citations
PageRank
Jaewoong Chung199352.00
Dhruva R. Chakrabarti218813.69
Chi Cao Minh3116061.54