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N. NANAWARE
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Name
Affiliation
Papers
N. NANAWARE
Department of Electrical EngineeringIndian Institute of Technology BombayMumbai400076India
1
Collaborators
Citations
PageRank
4
8
1.42
Referers
Referees
References
36
23
7
Publications (1 rows)
Collaborators (4 rows)
Referers (36 rows)
Referees (23 rows)
Title
Citations
PageRank
Year
A comprehensive modeling framework for gate stack process dependence of DC and AC NBTI in SiON and HKMG p-MOSFETs.
8
1.42
2014
1