Author Info
Name
Affiliation
Papers
PEI-YUAN CHIANG
Samsung Semicond, Modem Res & Dev Grp, Adv Cellular RFIC Design, San Jose, CA 95134 USA
2
Collaborators
Citations 
PageRank 
13
0
0.68
Referers 
Referees 
References 
0
0
0
Title
Citations
PageRank
Year
A 14nm Analog Sampling Fractional-N Pll With A Digital-To-Time Converter Range-Reduction Technique Achieving 80fs Integrated Jitter And 93fs At Near-Integer Channels00.342021
A 28-Nm 75-Fs(Rms) Analog Fractional-N Sampling Pll With A Highly Linear Dtc Incorporating Background Dtc Gain Calibration And Reference Clock Duty Cycle Correction00.342019