Ahmed Amine Jerraya - Citegraph

Author Info

Name	Affiliation	Papers
AHMED AMINE JERRAYA	TIMA Lab, F-38031 Grenoble, France	14
Collaborators	Citations	PageRank
20	154	15.23
Referers	Referees	References
419	158	69

Search Limit

100419

Publications (14 rows)

Collaborators (20 rows)

Referers (100 rows)

Referees (100 rows)

Title	Citations	PageRank	Year
Hardware/software interface codesign for embedded systems	41	2.33	2005
Automatic building of executable models from abstract SoC architectures made of heterogeneous subsystems	5	0.63	2004
Combining a performance estimation methodology with a hardware/software codesign flow supporting multiprocessor systems	16	1.19	2002
Cycle-true simulation of the ST10 microcontroller including the core and the peripherals	0	0.34	2000
Hardware/software co-design of an ATM network interface card: a case study	8	1.11	1998
Guest Editorial Introduction to the Special Issue on the Eighth IEEE International Symposium on System Synthesis	0	0.34	1997
Embedded architectural simulation within behavioral synthesis environment	2	0.42	1997
Design of an adaptive motors controller based on fuzzy logic using behavioural synthesis	0	0.34	1996
Formulation and evaluation of scheduling techniques for control flow graphs	27	1.63	1995
Synthesis steps and design models for codesign	35	3.29	1995
VHDL based design methodology for hierarchy and component re-use	9	1.20	1995
Accelerating the design process by using architectural synthesis	1	0.35	1994
Structured Design Methodology for High-Level Design	9	1.69	1994
Industrial experimentation of high-level synthesis	1	0.38	1993

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