Title | ||
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Automatic building of executable models from abstract SoC architectures made of heterogeneous subsystems |
Abstract | ||
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Designing SoCs requires several refinement steps using abstract architectural models before achieving a correct implementation of the system described at RT-level before and after each refinement step, the SoC model must be validated. If the model is executable then validation can be easily done by simulation. However, since modern SoCs are composed of heterogeneous subsystems, executable models for such heterogeneous systems require cosimulation interfaces to enable communication among the different subsystems. Most current validation approaches give little support for building executable models for heterogeneous systems. This paper presents an approach for automatic building executable models from abstract SoC architectures, allowing validation at early stages, at several intermediate design steps and with heterogeneous subsystems. Results for the validation of a MPEG-4 video encoder application showed that the time for building executable models was reduced drastically. |
Year | DOI | Venue |
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2004 | 10.1109/IWRSP.2004.1311101 | IEEE International Workshop on Rapid System Prototyping |
Keywords | Field | DocType |
computer architecture,integrated circuit design,integrated circuit modelling,program verification,system-on-chip,video coding,MPEG-4 video encoder,SoCs design,abstract SoC architectures,cosimulation interfaces | Computer architecture,System on a chip,Computer science,Real-time computing,Process design,Integrated circuit design,Encoder,Application software,Executable,Embedded system | Conference |
ISSN | ISBN | Citations |
1074-6005 | 0-7695-2159-2 | 5 |
PageRank | References | Authors |
0.63 | 4 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Adriano Sarmento | 1 | 5 | 0.63 |
Wander O. Cesário | 2 | 82 | 9.69 |
Ahmed Amine Jerraya | 3 | 154 | 15.23 |