Author Info
Name
Affiliation
Papers
ZDENEK VASICEK
Faculty of Information Technology, IT4Innovations Centre of Excellence, Brno University of Technology, Brno, Czech Republic
2
Collaborators
Citations 
PageRank 
1
0
0.68
Referers 
Referees 
References 
0
24
12
Title
Citations
PageRank
Year
Delay-aware evolutionary optimization of digital circuits00.342022
Synthesis of approximate circuits for LUT-based FPGAs00.342021