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JEONGHO HWANG
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Name
Affiliation
Papers
JEONGHO HWANG
Department of Electrical and Computer Engineering, Seoul National University, Seoul, South Korea
7
Collaborators
Citations
PageRank
29
5
2.49
Referers
Referees
References
16
0
0
Publications (7 rows)
Collaborators (29 rows)
Referers (16 rows)
Referees (0 rows)
Title
Citations
PageRank
Year
A 10 Gb/s PAM-4 Transmitter With Feed-Forward Implementation of Tomlinson-Harashima Precoding in 28 nm CMOS
0
0.34
2021
A 4-20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS
2
0.38
2021
A 48 Gb/s PAM-4 Transmitter With 3-Tap FFE Based on Double-Shielded Coplanar Waveguide in 65-nm CMOS
0
0.34
2020
A Programmable On-Chip Reference Oscillator With Slow-Wave Coplanar Waveguide in 14-nm FinFET CMOS
0
0.34
2020
A 35-Gb/s 0.65-pJ/b Asymmetric Push-Pull Inverter-Based VCSEL Driver With Series Inductive Peaking in 65-nm CMOS.
1
0.36
2018
25-Gb/s Clocked Pluggable Optics for High-Density Data Center Interconnections.
0
0.34
2018
A 6.7-11.2 Gb/s, 2.25 pJ/bit, Single-Loop Referenceless CDR With Multi-Phase, Oversampling PFD in 65-nm CMOS.
2
0.40
2018
1