| A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking | 5 | 0.49 | 2015 |
| Interconnect Challenges for 3D Multi-cores: From 3D Network-on-Chip to Cache Interconnects | 2 | 0.45 | 2015 |
| 3D stacking for multi-core architectures: From WIDEIO to distributed caches | 4 | 0.42 | 2013 |
