Paper Info
Title
A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking
Abstract
Wide voltage range operation for DSPs brings more versatility to achieve high energy efficiency in mobile applications. This paper describes a 32 bits DSP fabricated in 28 nm Ultra Thin Body and Box FDSOI technology. Body Biasing Voltage (VBB) scaling from 0 V up to ±2 V decreases the core VDDMIN to 397 mV and increases clock frequency by +400%@500 mV and +114%@1.3 V. The DSP frequency measurements show 2.6 GHz@1.3 V(VDD)@2 V(VBB) and 460 MHz@397 mV(VDD)@2 V(VBB). The lowest peak energy efficiency is measured at 62 pJ/op at 0.53 V. In addition to technological gains, maximum frequency tracking design techniques are proposed for wide voltage range operation. On silicon, at 0.6 V, those techniques allow high energy gain of 40.6% w.r.t. a worst case corner approach.
Year
DOI
Venue
2015
10.1109/JSSC.2014.2369503
Solid-State Circuits, IEEE Journal of  
Keywords
DocType
Volume
digital signal processing chips,embedded systems,energy conservation,silicon-on-insulator,DSP frequency measurements,VBB,VLIW DSP embedding maximum frequency tracking,body biasing voltage scaling,energy efficiency,frequency 2.6 GHz,frequency 460 MHz,high energy gain,maximum frequency tracking design techniques,size 28 nm,ultra thin body-box FDSOI technology,voltage 0.6 V,voltage 1.3 V,voltage 397 mV,voltage 500 mV,word length 32 bit,FDSOI,high energy efficiency,low power,low voltage,timing fault sensors
Journal
50
Issue
ISSN
Citations 
1
0018-9200
5
PageRank 
References 
Authors
0.49
0
4
Name
Order
Citations
PageRank
Edith Beigne153652.54
Alexandre Valentian211914.94
Miro-Panades, I.3111.35
R. Wilson411512.60