Paper Info
Title
Application Capturing and Performance Estimation in an Holistic Design Environment
Abstract
The objective of the hArtes (Holistic Approach to Reconfigurable real Time Embedded Systems) is to provide a tool set that facilitates the management of entire design flow. Despite of its improved design productivity, the two bottleneck are: (1) capturing initial application specifications in the specified graphical tool and (2)Cycle accurate performance estimation in design space exploration.We propose: (1) a transformation methodology for converting reference sequential C code to data-flow specifications and (2) a design space exploration framework based on cycle accurate performance estimation. The proposed transformation methodology is based on functions reorganization and variables definitions. The proposed design space exploration framework consists of two design loops: computational architecture selection loop and communication architecture selection loop. Before entering into these loops, it is critical to estimate the performance of application function blocks. We propose a performance estimation methodology by performing simulations at CABA (Cycle Accurate Bit Accurate) level. Instead of simulating the entire application, each function block is instrumented and executed on the target simulation platform and the resulting information is stored in a performance estimation library. Experimentation with H.264 video encoding applicationproves the viability of the proposed transformation methodology. Validation and performance evaluations for performance estimation technique are done by extending theSoCLib library of simulation models.
Year
DOI
Venue
2009
10.1109/ECBS.2009.29
ECBS
Keywords
Field
DocType
program verification,software architecture,software performance evaluation,H.264 video encoding,communication architecture selection loop,computational architecture selection loop,cycle accurate bit accurate level,data-flow specifications,holistic design environment,reconfigurable real time embedded systems,sequential C code,specified graphical tool
Bottleneck,Algorithm design,Computer science,Real-time computing,Simulation modeling,Design flow,Software architecture,Quantization (signal processing),Design space exploration,Encoding (memory)
Conference
Citations 
PageRank 
References 
0
0.34
6
Authors
2
Name
Order
Citations
PageRank
Muhammad Rashid15713.74
Bernard Pottier29119.77