Name
Title | ||
|---|---|---|
Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions |
Abstract | ||
|---|---|---|
This paper presents experimental results putting in evidence the potential weaknesses of a state-of-the-art fault tolerance strategy, the Triple Modular Redundancy (TMR), when implemented in SRAM-based FPGAs. HW/SW fault injection campaigns and accelerated radiation ground tests were performed to quantify the number of faults, Single Event Upsets (SEUs) required to obtain such critical failures. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1007/s10836-011-5245-4 | J. Electronic Testing |
Keywords | Field | DocType |
TMR,FPGA,SRAM,SEUs,Laser tests,Fault injection,Heavy ions | Ground testing,Heavy ion,Field-programmable gate array,Static random-access memory,Encryption,Electronic engineering,Engineering,Fault injection | Journal |
Volume | Issue | ISSN |
27 | 5 | 0923-8174 |
Citations | PageRank | References |
4 | 0.46 | 1 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gilles Foucard | 1 | 9 | 1.26 |
| Paul Peronnard | 2 | 15 | 2.32 |
| Raoul Velazco | 3 | 124 | 19.48 |