Name
Affiliation
Papers
RAOUL VELAZCO
Laboratoire TIMA, Grenoble, France
33
Collaborators
Citations 
PageRank 
74
124
19.48
Referers 
Referees 
References 
359
453
168
Search Limit
100453
Title
Citations
PageRank
Year
NoCFI: A Hybrid Fault Injection Method for Networks-On-Chip00.342019
A Wireless Embedded System for Measuring the Effects of Ionizing Radiations00.342019
Delay-Tolerant Wireless Networks on Chip: Preliminary Analysis and Results00.342019
A Runtime Fault-Tolerant Routing Scheme for Partially Connected 3D Networks-on-Chip00.342018
A Soft-Error Resilient Route Computation Unit For 3d Networks-On-Chips10.342018
Assessing Contact Graph Routing Performance and Reliability in Distributed Satellite Constellations30.452017
Low cost rollback to improve fault-tolerance in VLSI circuits00.342017
SEU impact in processor's control-unit: Preliminary results obtained for LEON3 soft-core20.452017
Hardware implementation of a fault-tolerant Hopfield Neural Network on FPGAs70.492016
Towards an efficient SEU effects emulation on SRAM-based FPGAs.00.342016
A deep analysis of SEU consequences in the internal memory of LEON3 processor00.342016
Internetworking approaches towards along-track segmented satellite architectures00.342016
An automated fault injection for evaluation of LUTs robustness in SRAM-based FPGAs00.342015
Optimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis20.402015
Evaluating SEU fault-injection on parallel applications implemented on multicore processors30.372015
SEU fault-injection at system level: Method, tools and preliminary results00.342014
Preliminary results of SEU fault-injection on multicore processors in AMP mode10.372014
Two complementary approaches for studying the effects of SEUs on HDL-based designs10.362014
SEU fault-injection in VHDL-based processors: A case study100.702013
A New Fault Injection Approach To Study The Impact Of Bitflips In The Configuration Of Sram-Based Fpgas10.392011
Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions40.462011
A generic platform for remote accelerated tests and high altitude SEU experiments on advanced ICs: Correlation with MUSCA SEP3 calculations40.682009
A Survey on Fault Injection Techniques472.102004
A Methodology For Test Replacement Solutions Of Obsolete Processors51.862003
Efficiency of transient bit-flips detection by software means: a complete study20.382003
Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied81.472002
Synthesis of an 8051-Like Micro-Controller Tolerant to Transient Faults60.642001
Soft Errors and Tolerance for Soft Errors00.342001
Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL91.052000
Study of Two ANN Digital Implementations of a Radar Detector Candidate to an On-Board Satellite Experiment10.381999
Analysis and Improvement of Neural Network Robustness for On-Board Satellite Image Processing10.371997
Analysis of experimental results on functional testing and diagnosis of complex circuits51.491988
A Microprocessor Test Approach Allowing Fault Localization10.561985